1 Introduction

With the development of modern technology, semiconductor devices and components have been widely used in engineering and commerce. Its large number of applications in radar, remote control and telemetry, aerospace, etc. put forward higher and higher requirements for its reliability. The failure caused by poor chip bonding (sticking) has also attracted more and more attention, because such failures are often fatal and irreversible. There are many techniques for soldering (sticking) the chip to the package, which can be summarized as metal alloy soldering (or called low-melting soldering) and resin pasting. The mechanism of their connection to the chip is quite different, and a reasonable selection must be made according to the type and requirements of the device. To obtain the ideal connection quality, it is also necessary to analyze the mechanism and characteristics of various welding (sticking) techniques, analyze many factors that affect its reliability, and continuously improve in the process. This article briefly describes the mechanism of two types of semiconductor device welding (sticking) techniques, compares the characteristics and applicability of several common techniques, and discusses the most widely used gold-silicon alloy welding failure in semiconductor devices. Patterns and their solutions.

 

 

2 Chip welding (pasting) skills and mechanism

Chip welding refers to the technique of forming a solid, conductive or insulating connection between a semiconductor chip and a carrier (package housing or substrate). In addition to providing mechanical and electrical connections for the device, the soldering layer must also provide a good heat dissipation channel for the device. The technique can be divided into resin bonding method and metal alloy welding method.

 

The resin bonding method is to use a resin adhesive to form an insulating layer between the chip and the package body or to dope metal (such as gold or silver) in it to form a good conductor of electricity and heat. Most of the adhesives are epoxy resin. Epoxy resin is a stable linear polymer. After adding a curing agent, the epoxy group opens to form a hydroxyl group and cross-chain, so that the linear polymer is cross-chained into a network structure and cured into a thermosetting plastic. The process is from liquid or viscous liquid→gelation→solid. The curing conditions are mainly determined by the choice of curing agent. The content of doped metal determines its electrical and thermal conductivity.

 

The silver-doped epoxy bonding method is currently one of the most popular chip bonding techniques. It requires a low curing temperature, which can avoid thermal stress, but has the disadvantage of silver migration [2]. In recent years, gold conductive adhesives used in small and medium power transistors are better than silver conductive adhesives [3]. Non-conductive fillers include aluminum oxide, beryllium oxide, and magnesium oxide, which can be used to improve thermal conductivity. The resin pasting method is widely used because the carrier does not need to be heated during the operation, the equipment is simple, the process is easy to realize automatic operation, and the economical benefits are widely used, especially in integrated circuits and low-power devices. The thermal resistance and electrical resistance of the resin-bonded device are both high. The resin simply decomposes at high temperature, and the precipitation of the filler may occur, leaving only a layer of resin on the sticking surface to increase the resistance there. Therefore, it is not suitable for devices that require high temperature operation or low paste resistance. In addition, the mechanical strength of the resin bonding surface is far inferior to that of eutectic welding.

 

The metal alloy welding method mainly refers to the eutectic welding of gold silicon, gold germanium, and gold tin. Here we mainly take gold-silicon eutectic welding as an example to discuss. The melting point of gold is 1063°C and the melting point of silicon is 1414°C, but the melting point of gold-silicon alloys is much lower than that of elemental gold and silicon. It can be seen from the phase diagram of the binary system that the eutectic point temperature of the Au-Si eutectic containing 31% silicon atoms and 69% gold atoms is 370°C. This eutectic point is the main basis for selecting the appropriate welding temperature and controlling the welding depth. The gold-silicon eutectic welding method is that the chip is under absolute pressure (with friction or ultrasound). When the temperature is higher than the eutectic temperature, the gold-silicon alloy is transformed into a liquid Au-Si eutectic; after cooling, when the temperature is low At the eutectic temperature, the eutectic body changes from a liquid phase to a mechanical mixture that combines with each other in the form of crystal grains-gold-silicon eutectic crystals and all solidify, thereby forming a strong ohmic contact welding surface. The eutectic welding method has the advantages of high mechanical strength, low thermal resistance, good stability, high reliability and less impurities. Therefore, it has been widely used in the chip assembly of microwave power devices and components and is highly reliable. Favored by the device packaging industry, its welding strength has reached 245MPa [4]. Metal alloy welding also includes "soft solder" welding (such as 95Pb/5Sn, 92.5Pb/5In/2.5Ag), because its mechanical strength is relatively small, and it is not commonly used in semiconductor device chip welding. .

 

No matter which soldering technique is used, the sign of success is that the interface between the chip and the soldering surface of the package is firm, smooth and free of voids. Because Au-Si eutectic welding is the most widely used in semiconductor devices and microelectronic circuits, the reasons and solutions for the failure of this welding technique are discussed here in combination with actual work.

 

3 Failure mode analysis

3.1 Poor ohmic contact

 

A good ohmic contact between the chip and the substrate is a prerequisite to ensure the normal operation of the power device. Poor ohmic contact will increase the thermal resistance of the device, uneven heat dissipation, affect the distribution of current in the device, destroy the thermal stability of the device, and even cause the device to burn. There are three ways to dissipate heat in semiconductor devices: radiation, convection and conduction, among which heat conduction is the main way of heat dissipation. Take a silicon microwave power transistor as an example. Figure 1 is a silicon microwave power tube assembly model, and Figure 2 is its thermal equivalent circuit. Among them, Tj is the junction temperature of the die, and TC is the temperature of the case; R1, R2, R3, R4, and R5 are the thermal resistance of the chip, the Au-Si solder layer, BeO, the interface solder layer and the tungsten copper base, respectively. The total thermal resistance R=R1+R2+R3+R4+R5. The heat generated by the chip collector junction is mainly transferred to the WCu shell through the silicon wafer, the solder layer, and BeO. Welding and voids in the Au-Si welding layer are the main reasons for poor ohmic contact. The voids will cause current intensive effects, and irreversible and destructive thermoelectric breakdowns may be formed near them, that is, secondary breakdowns. Poor ohmic contact of the soldering layer brings great hidden dangers to the reliability of the device.

 

3.2 Thermal stress failure

 

This is a failure caused by mechanical stress. Because the final manifestation of its failure is often welding surface crack or chip peeling, it is summarized as one of the micro-welding failure modes for discussion here. The welding interface of microelectronic devices is composed of some materials with different properties, such as Si, SiO 2, BeO, Al2O3, WCu, etc. The coefficients of linear thermal expansion of these materials are different. For example, the coefficient of expansion of WCu, which is commonly used as a base, is almost 4 times larger than that of Si crystal. When they are combined, there will be compressive or tensile stresses between different material interfaces. Microwave power devices are often subjected to thermal cycling during operation. Because the thermal expansion coefficients of the chip and the package are different, periodic shear stresses are generated between the soldering surfaces during the thermal cycling process. These stresses may concentrate on the voids to make the solder. The formation of cracks and even cracking of the silicon wafers will eventually lead to the failure of the device due to thermal fatigue.

In the solder layer between the chip and the package, the maximum thermal shear deformation can be estimated as

S=DΔαΔT/2d　　　　　　（１）

In the formula, D is the diagonal size of the chip; d is the thickness of the solder layer; ΔT=Tmax－Tmin, Tmax is the temperature of the solidification line of the solder, and Tmin is the lowest temperature in device screening; Δα is the coefficient of thermal expansion of the chip and substrate materials Difference.

It can be seen from the above formula that the thermal deformation is directly proportional to the size of the chip. The larger the chip size, the greater the shearing force it has to withstand during the warm cycle after soldering. From this perspective, it is very necessary for high-power devices to adopt small chip multi-cell synthesis.

In soldering, the thermal matching between the chip and the substrate must be fully considered. If a ceramic substrate with a thermal expansion coefficient very similar to that of silicon (such as AlN) is used in a silicon device, the thermal stress will be greatly reduced and it can be used for large chip assembly.

 

4 Three inspection techniques for welding quality

4.1 Shear force measurement

 

This is the most commonly used and intuitive technique to check the quality of the soldering between the chip and the substrate. Figure 3 shows the relationship between the minimum shear force of GJB548A-96 used to detect chip bonding and the chip area. In the case of good soldering, even if the chip is shattered, there are still large residual traces of the chip at the soldering place. Generally, the chip substrate material is not adhered to the welding cavity, and the size and density of the cavity can be directly observed after the chip is pushed off. Figure 4 is a photo of soldering voids observed after the chip of a certain device is pushed off. If the device pasted by resin paste method is to work for a long time at a higher and lower temperature, the shear strength at different temperatures should be measured.

 

4.2 Electrical performance test

 

For bipolar devices with conductive connections between the chip and the substrate or the base (such as eutectic soldering, conductive adhesive paste), the quality of the soldering (bonding) directly affects the thermal resistance and saturation voltage drop Vces of the device, so the transistor Such devices can non-destructively check the soldering quality of the chip by measuring the Vces of the device. In the case of ensuring good electrical performance of the chip, if the Vces is too large, the chip may be soldered or have a large "void". This technique can be used for online exams in mass production.

 

4.3 Ultrasonic testing

 

The theoretical basis of ultrasonic detection techniques is that the interfaces of different media have different acoustic properties, and the ability to reflect ultrasonic waves is also different. When the ultrasonic wave encounters a defect, it will be reflected back to produce a "shadow" with a projection area similar to that of the defect. For devices with multilayer cermet packaging, it is often necessary to thin the back of the package body before testing. At the same time, welding failure caused by thermal stress is difficult to find with general examination and inspection methods. High stress must be applied to the device. Generally, the defect is activated after aging, that is, the device can only be found after failure. Figure 5 is an acoustic scan photo of a failed device after the backside is thinned. The inside of the black circle is divided into welding defects. Ultrasonic waves can accurately detect the location and size of defects in the welding area.

 

Ultrasonic testing with ultrasonic flaw detector is an effective technique to check the quality of chip welding.

 

5 Reasons for poor welding and corresponding measures

5.1 Oxidation on the back of the chip

 

During the device production process, gold is often vaporized on the back of the chip before soldering. At the Au-Si eutectic temperature, Si will penetrate the gold layer and be oxidized to form SiO2. This layer of SiO2 will cause uneven solder wetting, resulting in a decrease in solder strength. Even at room temperature, silicon atoms will slowly move to the surface of the gold layer through inter-diffusion between crystal grains. Therefore, the shielding gas N2 must ensure a sufficient flow rate during welding, and it is best to add part of H2 for reduction. The preservation of the chip should also attract enough attention. Not only the temperature and humidity of the environment should be paid attention to, but also its future solderability should be considered. The chips that are not used for a long time should be stored in a nitrogen cabinet.

 

5.2 Welding temperature is too low

 

Although the Au-Si eutectic point is 370°C, heat has to be lost during the transfer process, so a slightly higher part should be selected, but it should not be too high to avoid oxidation of the shell surface. The welding temperature should also be adjusted according to the material, size, and heat capacity of the shell. In order to ensure the quality of welding, the surface temperature of the heating base should be measured regularly with a surface thermometer, and the temperature of the welding surface should be monitored if necessary.

 

5.3 The pressure is too small or uneven during welding

 

Absolute pressure should be applied to the chip during soldering. Too small or uneven pressure will cause gaps or virtual soldering between the chip and the substrate. Table 2 is a comparison of the shear strength of a certain type of chip under different pressures. It can be seen from Table 2 that after the pressure is reduced, the chip shear strength is greatly reduced, and it can also be observed in the experiment that the residual area of ​​the silicon wafer is less than 50%. But also can not make the pressure too large, so as to avoid fragmentation. Therefore, it is very important to adjust the pressure during welding. It must be adjusted according to the comprehensive situation of the material, thickness and size of the chip. Only by accumulating data in practice can the ideal welding effect be obtained.

 

       5.4 Poor substrate cleanliness

 

If the substrate is contaminated, partly oily or oxidized, it will seriously affect the wettability of the soldering surface. This kind of contamination is relatively simple to observe during the soldering process, and then the substrate must be reprocessed.

 

5.5 Excessive thermal stress

 

The failure caused by thermal stress is a slow gradual process, it is not easy to detect, but it is extremely harmful. Generally, the larger the chip thickness, the smaller the corresponding stress. Therefore the chip should not be too thin. In addition, if the thermal performance of the substrate or the base is not matched with the chip, it will cause great mechanical stress. The substrate or base can be preheated at 200°C before soldering, and the tip used to pick up the chip can also be appropriately heated to reduce thermal shock. After welding, it can be slowly cooled under N2 protective atmosphere, and part of the stress can also be eliminated during this cooling process.

 

5.6 The gold layer of the substrate is too thin

 

When the gold plating layer of the substrate is thin and not dense enough, even under the protection of nitrogen, when the Au-Si eutectic temperature is reached, the plating layer will undergo serious discoloration, which will affect the welding strength. Experiments have proved that for a chip of 1mm×1mm, reliable eutectic welding can be obtained only if the thickness of the gold-plated layer on the substrate is greater than 2μm. Generally speaking, the larger the chip size, the corresponding increase in the gold plating layer.

 

Conclusion:

With the development of technology, there are more and more chip welding (sticking) skills and continuous improvement. The failure of soldering (sticking) of semiconductor devices is mainly related to poor cleanliness of the soldering surface, unevenness, oxides, improper heating and the quality of the substrate coating. The resin paste method is also restricted and affected by the composition and structure of the adhesive and its related physical and mechanical properties. To solve the problem of poor chip micro-welding, it is necessary to understand the mechanism of different techniques, analyze various failure modes one by one, find the unfavorable factors that affect the quality of welding (sticking) in time, and strictly inspect the production process and strengthen process management to effectively avoid it. Potential harm to the reliability of the device due to poor chip soldering.